Companies

Tensilica

Tensilica Articles

Displaying 61 - 80 of 139
Design
25th March 2010
IntegrIT Joins Tensilica’s Xtensions Partner Network for DSP Software Services

Tensilica announced that IntegrIT DSP Design House, a leading supplier of DSP (digital signal processing) software solutions, has joined Tensilica’s Xtensions™ partner network to provide vital software components, including the high-performance Nature DSP Signal+ library, for the ConnX Baseband Engine, HiFi Audio DSPs and the ConnX D2 communications DSP. The IntegrIT Nature DSP Signal+ is a collection of signal processing functions that assi...

Analysis
23rd March 2010
Multiple Tensilica IP Cores Power NEC, Fujitsu and Panasonic Mobile Communications Fully Functional LTE Handset SOC for Major Japanese WirelessCarrier

Tensilica announced that NTT DOCOMO has confirmed that several Tensilica Xtensa LX dataplane processor cores (DPUs) are used in the latest LTE (Long-Term Evolution) mobile handset system-on-chip (SOC) design demonstrated in February at the Mobile World Congress (Barcelona, Spain). NTT DOCOMO previously exhibited the device developed under a collaborative project among DOCOMO, Fujitsu, NEC and Panasonic Mobile Communications (Panasonic Mobile), wh...

Pending
15th March 2010
Tensilica Introduces Third Generation Diamond Standard Controllers Optimized for Low Power, High Performance Applications

Tensilica Inc. today introduced its third generation of Diamond Standard controllers. This family of five upward-compatible processor cores is based on a common Xtensa architecture and provides the price/performance/low-power required for a wide range of embedded control functions in today's compute-intensive dataplane functions. Improvements in this third generation of Diamond Standard controllers deliver up to 15 percent faster clock speed, up ...

Analysis
11th February 2010
mimoOn Joins Roster of Tensilica's Rapidly Expanding Xtensions Program for Fast LTE/4G Development

Tensilica announced that its ConnX Baseband Engine comes with the broad ecosystem support of Tensilica's Xtensions(TM) Partner Network , including the newest Xtensions member, mimoOn. (see separate press release). Tensilica's Xtensions Partner Program brings its LTE (Long Term Evolution) baseband handset and base station design customers a robust infrastructure of top-tier partners in SOC (system-on-chip) design-critical areas such as LTE physi...

Analysis
10th February 2010
Tensilica and mimoOn Partner for LTE Baseband Handset Solutions

mimoOn, a pioneer in LTE software implementations for programmable radio platforms, and Tensilica® Inc., a leader in programmable and efficient IP cores for advanced mobile wireless SOCs (system-on-chips), today announced a partnership to offer best-in-class LTE solutions for mobile wireless radios based on mimoOn's mi!MobilePHY software and Tensilica's newly announced ConnX Baseband Engine (BBE16) and ConnX Atlas LTE Reference Design.

Design
9th February 2010
Tensilica: HiSilicon, a Division of Huawei, Licenses Tensilica's Xtensa Dataplane Processor and ConnX DSP IP Cores

Tensilica announced today that HiSilicon Technologies has licensed Tensilica's Xtensa® customizable dataplane processors (DPUs) and ConnX(TM) DSP (digital signal processing) semiconductor IP cores. HiSilicon will use Tensilica's DPUs and DSPs in network equipment chip design.

Communications
8th February 2010
Tensilica Introduces ConnX Atlas Reference Architecture for LTE

Tensilica introduced its ConnX Atlas LTE (Long-Term Evolution) reference platform, a heterogeneous seven-core reference architecture for a complete multi-standard programmable radio for advanced mobile devices. Atlas is designed to support the 3GPP (3rd Generation Partnership Project) LTE standard, as well as other complementary standards such as HSPA+ (Evolved High-Speed Packet Access), in a single platform. No additional hardwired hardware bloc...

Pending
8th February 2010
Tensilica - Second Generation ConnX BaseBand Engine DSP for Demanding Algorithms for LTE/4G Wireless Handsets and Base Stations

Tensilica introduced ConnX BBE16, its second generation baseband engine for LTE and 4G baseband SOC designs. ConnX BBE16's 16-way MAC architecture is optimized for the most demanding wireless DSP tasks, including OFDM algorithms and FFT, FIR, IIR, and matrix computation.

Analysis
4th February 2010
Tensilica Introduces HiFi EP DSP Core for High Quality Audio in Home Entertainment and Smartphone Applications

Building on the success of its HiFi 2 Audio DSP, the leading architecture for audio in system-on-chip (SOC) designs, Tensilica today introduced HiFi EP, a superset of the HiFi 2 architecture that is optimized for simultaneous multichannel codec support and/or continuously expanding audio pre and post processing in home entertainment products such as Blu-ray Disc players, digital television (DTV), and Smartphones.

Analysis
6th January 2010
Tensilica Demonstrates Success in Audio/Video and Broadband Communications at CES 2010

A host of products based on Tensilica's dataplane processors will be demonstrated at this year's Consumer Electronics Show, January 7-10 in Las Vegas. These Tensilica-enabled products include some of the most advanced, innovative consumer devices, including Blu-ray Disc players, Bluetooth-enabled devices, LCD TVs, cellular phones, WiFi- and W-USB-enabled notebook computers, wireless HDMI, handheld games, and inkjet and laser printers. Tensilica w...

Design
16th December 2009
Tensilica Delivers New Design Flow Support for Synopsys’ Galaxy Implementation Platform Technologies

Tensilica, Inc. today announced that it now provides out-of-the-box automated design flow support for key technologies within Synopsys' Galaxy Implementation Platform, including DC Ultra RTL synthesis and IC Compiler place-and-route, for Tensilica's new Xtensa 8 and Xtensa LX3 dataplane processors (DPUs). This latest design flow provides up to 15% improvement in processor speed, area and power, in addition to faster design closure over previous S...

Design
7th December 2009
Top EDA Companies Endorse Tensilica's Pin-Level SystemC Models

Tensilica has announced that it has expanded the range of processor modeling options with the introduction of pin-level SystemC models of its Xtensa customizable dataplane processors (DPUs). With this novel feature, Tensilica now offers the widest array of modeling choices of any provider of licensable microprocessor or DSP (digital signal processing) IP cores.

Design
7th December 2009
Tensilica Announces Enhanced Tools for Dataplane Processor Design and Software Development

Tensilica has announced its eighth generation tools that further automate customized Xtensa dataplane processor (DPU) design and speed software development. Improvements cover improved compiler technology, better multi-core system simulation and profiling, an upgraded integrated development environment (IDE), and pin-level co-simulation with RTL.

Pending
6th November 2009
Tensilica DPU Family Delivers 10 GigaMAC/sec DSP Performance, Tops 1 GHz Mark

Tensilica has introduced the Xtensa LX3 high-performance dataplane processor (DPU) core optimized for digital signal processing (DSP) and control in the system-on-chip (SOC) dataplane. The Xtensa LX3 DPU offers the industry's widest range of pre-verified DSP options ranging from a simple floating point accelerator to a 16-MAC (multiply accumulator) vector DSP powerhouse.

Analysis
19th October 2009
Ultra-Low Power Dataplane Processor Core for Deeply Embedded Control

Tensilica has introduced the Xtensa 8 customizable processor, the eighth generation of its low-power dataplane processor cores (DPUs). The Xtensa 8 processor core starts at a size of just 15,000 gates, consuming less than 0.05mm2 in 40nm process technology - making it one of the smallest licensable controller cores on the market. With power dissipation starting at just 12 µW/MHz, it's also one of the lowest power licensable 32-bit architecture...

Design
26th August 2009
Tensilica - New DSP Engine Combines Outstanding Performance, Compact Size, and Easy Programmability

Tensilica has introduced the high-performance, small, low-power ConnX D2 16-bit dual-MAC (Multiply Accumulator) DSP (Digital Signal Processor) engine for its proven Xtensa LX dataplane processor cores for SOC (System-on-Chip) designs. The ConnX D2 DSP engine provides uncompromised performance from C code, unlike many other DSPs that require time consuming assembly coding for maximum performance. This means that virtually any C program, including ...

Analysis
13th July 2009
Blue Wonder Communications to Develop LTE Baseband IP Using Multiple Optimized Tensilica Dataplane Processors

Tensilica has announced that Blue Wonder Communications has licensed Tensilica’s Xtensa dataplane processors (DPUs) for an LTE (Long-Term Evolution) embedded broadband modem design. Blue Wonder Communications is an independent design house developing mobile broadband solutions for the telecommunications and semiconductor industries. Many of the employees at Blue Wonder Communications previously were employed by NXP’s wireless division and hav...

Analysis
22nd June 2009
Tensilica - High-Performance ConnX Baseband Engine for LTE and 4G Wireless DSP Handsets and Base Stations

Tensilica has announced the first member of its new ConnX family of DSP cores for system-on-chip design. The ConnX Baseband Engine enables efficient baseband processing for 3G, LTE (Long-Term Evolution) and 4G wireless equipment with its scalable, high-performance DSP architecture that provides industry leading computational throughput of 16 18-bit MACs per cycle. The ConnX Baseband Engine features an optimized instruction set, high memory bandwi...

Communications
22nd June 2009
High-Performance ConnX Communications DSP Family for LTE and 4G SOC Designs

Tensilica has introduced a family of high-performance communications DSP IP cores – the ConnX DSP family – that include standard cores, click-box configurable options or a starting point for customized Xtensa LX DPUs (dataplane processor units) for SOC designs. The newest member of the family, the ConnX Baseband Engine – see separate press release – provides industry leading computational throughput (sixteen 18-bit MACs per cycle) due to...

Analysis
9th June 2009
TranSwitch Integrates Xtensa Processors

Tensilica has announced that TranSwitch Corporation has integrated two Xtensa customizable Dataplane Processor Units (DPUs) into its recently introduced Atlanta 2000 gigabit-rate communications processor product family. Atlanta 2000 offers robust gateway routing, security and VoIP capabilities with unmatched performance and power efficiency, enabling customers to develop the next generation of high-performance green networking products and servi...

First Previous Page 4 of 7 Next Last

Product Spotlight

Upcoming Events

View all events
Newsletter
Latest global electronics news
© Copyright 2024 Electronic Specifier