Design

HIL technology boosted with MP simulation extension

15th August 2014
Staff Reporter
0

SCALEXIO, hardware-in-the-loop (HIL) technology from dSPACE, has been given a boost with an extension for a multi-processor (MP) simulation platform. The extension allows users to connect several SCALEXIO multi-core processing units to create simulation platforms for real-time computation. This gives embedded systems, requiring computationally intensive, high-fidelity simulation models, the ability to handle validation and verification tasks for complex vehicle systems.

Combining existing SCALEXIO systems, used for unit-level testing, allows users to create system-level or entire-vehicle-level integration testing platforms. This results in the leveraging of available infrastructure and the reduction in development costs. Providing computation extensibility, the processing units can also be coupled to dSPACE HIL systems based on DS1005, DS1006 and DS1007 processor boards. This is a cost-effective way to add new SCALEXIO capabilities to existing systems.

The HIL solutions provide testing capability for ECU software across all vehicle domains and industries.

SCALEXIO systems can be coupled by interconnecting processing units via IOCNET, dSPACES's network technology. Facilitating distributed I/O connections across long distances, IOCNET handles the exchange of very large data volumes while maintaining low I/O latency times.

The company's ConfigurationDesk tool can be configured with the entire simulation model, and used to deploy individual simulation models on processors. Filters can also be configured to create specific views of the overall simulation model. All vehicles domains are covered with HIL solutions, providing testing capability for ECU software across all industries.


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