IP portfolio for automotive design enablement platform

13th September 2017
Posted By : Alice Matthews
IP portfolio for automotive design enablement platform

A comprehensive automotive IP portfolio for the TSMC 16nm FinFET Compact (16FFC) automotive process technology has been delivered by Cadence Design Systems. This broad IP portfolio enables a host of applications ranging from in-vehicle infotainment, in-cabin electronics, vision subsystems, digital noise reduction and advanced driver assistance system (ADAS) subsystems and is registered in the TSMC9000A programme.

The comprehensive IP portfolio incorporates the key IP needed to implement advanced infotainment and ADAS systems on chip (SoCs), and includes the Cadence flagship 4266-speed grade LPDDR4/4X DDR PHY and controllers and PCI Express 4.0/3.0 (PCIe4/3) PHY and controllers. This is complemented by subsystems supporting MIPI D-PHYSM, USB3.1/USB2.0, DisplayPort, Octal SPI/QSPI, UFS and Gigabit Ethernet with TSN.

In order to support cost-effective automotive SoC designs, Cadence IP is area- and power-optimised for the AEC-Q100 Grade 2 temperature range, eliminating the need to carry Grade 1 power and area penalties into cost-sensitive automotive SoC designs. Cadence IP is designed to be ASIL-B ready and ASIL-C/D capable based on end users’ safety goals and safety requirements as outlined in the ISO 26262 standard.

“Renesas has been the world leader in providing automotive computing SoCs for a long time,” said Masahiro Suzuki, Vice President of the Automotive Solutions Business Unit, Renesas Electronics. “We are seeing increased adoption of advanced MCUs in automobiles to accelerate autonomous driving, connected cars and electric vehicles. To address these trends in a timely manner, we have been working with Cadence on the development of physical IP using cutting-edge process nodes. Cadence has delivered advanced solutions for LPDDR4/4X PHY that support the highest LPDDR4 memory speed available in the market.”

“Cadence automotive subsystem solutions have been designed from the ground up to meet the stringent requirements of automotive OEMs and tier 1 suppliers,” said Babu Mandava, Cadence’s Senior Vice President and General Manager, IP Group. “Additionally, Cadence IP is performance optimised for the advanced SoC designs for in-vehicle infotainment and ADAS applications. Through our continued collaboration with TSMC, we’re making it very simple for automotive designers to use the most advanced IP solutions to deliver innovative products to market quickly with confidence that they are compliant with the industry’s latest safety and reliability standards.”

“Cadence has quickly adapted its IP portfolio to support automotive applications for our 16FFC process, enabling accelerated design-ins with major automotive suppliers,” said Suk Lee, TSMC Senior Director, Design Infrastructure Marketing Division. “Our ongoing collaboration with Cadence has resulted in a robust, comprehensive set of IP that enables today’s complex automotive designs for ADAS applications and infotainment systems.”


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